| US 7,549,580 B2 | ||
| Card and host device | ||
| Akihisa Fujimoto, Fussa (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Mar. 05, 2008, as Appl. No. 12/43,005. | ||
| Application 12/043005 is a continuation of application No. 11/553002, filed on Oct. 26, 2006, granted, now 7,353,993. | ||
| Application 11/553002 is a continuation of application No. PCT/JP2005/021689, filed on Nov. 25, 2005. | ||
| Claims priority of application No. PCT/JP2004/017627 (WO), filed on Nov. 26, 2004. | ||
| Prior Publication US 2008/0149715 A1, Jun. 26, 2008 | ||
| Int. Cl. G06K 7/06 (2006.01) | ||
| U.S. Cl. 235—441 [235/492] | 14 Claims |
| 1. A host device configured to read and write information from and into a card and to supply a supply voltage that belongs
to a first voltage range or a second voltage range having an upper limit which is lower than a lower limit of the first voltage
range, the host device configured to issue to the card a voltage identification command including a voltage range identification
section, an error detection section, and a check pattern section, wherein
the voltage range identification section includes information indicating which one of the first voltage range and the second
voltage range the supply voltage belongs,
the error detection section has a pattern configured to enable the card which has received the voltage identification command
to confirm whether the voltage identification command is valid or invalid,
the check pattern section has a preset pattern,
the host device changes an initialization command into a new memory initialization command depending on whether the host device
receives a response to the voltage identification command, the initialization command including a voltage window section instructing
the card to initialize a memory, the new memory initialization command including the voltage window section and a section
other than the voltage window section, and
the host device issues the new memory initialization command to the card.
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