| US 7,389,014 B2 | ||
| Integrated semiconductor circuits and methods of making integrated semiconductor circuits | ||
| Theodore I Kamins, Palo Alto, Calif. (US) | ||
| Assigned to Hewlett-Packard Development Company, L.P., Houston, Tex. (US) | ||
| Filed on Mar. 31, 2006, as Appl. No. 11/393,845. | ||
| Prior Publication US 2007/0228459 A1, Oct. 04, 2007 | ||
| Int. Cl. G02B 6/12 (2006.01); H01L 21/00 (2006.01); H01L 33/00 (2006.01); B31D 3/00 (2006.01) | ||
| U.S. Cl. 385—14 [385/131; 438/29; 438/31; 216/56; 257/98; 257/99; 257/103] | 22 Claims |
| 1. An integrated semiconductor circuit, comprising:
a substrate having a surface of a first semiconductor material;
at least one separating material layer formed on the surface of the substrate, the at least one separating material layer
defining a through hole extending to the surface; and
a guide region comprising at least one second semiconductor material, the guide region including at least a first region formed
in a first portion of the hole and a second region formed in a second portion of the hole, the first region contacting the
surface of the substrate over a contact region having a maximum width of about 5 nm to about 50 nm, and the second region
having a larger cross-section than the first region.
|