| US 7,549,040 B2 | ||
| Method and system for caching peripheral component interconnect device expansion read only memory data | ||
| James Arthur Lindeman, Austin, Tex. (US); and Muhamed Sadic, Cedar Park, Tex. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Apr. 19, 2006, as Appl. No. 11/379,289. | ||
| Prior Publication US 2007/0250690 A1, Oct. 25, 2007 | ||
| Int. Cl. G06F 9/00 (2006.01) | ||
| U.S. Cl. 713—1 [713/187; 711/102] | 9 Claims |
| 1. A computer implemented method in a data processing system for caching peripheral component interconnect device data, the
computer implemented method comprising:
responsive to probing a first peripheral component interconnect device within a plurality of different peripheral component
interconnect devices included on a peripheral component interconnect card, discovering peripheral component interconnect device
data that resides in a peripheral component interconnect expansion memory connected only to the first peripheral component
interconnect device, wherein only the first peripheral component interconnect device within the plurality of different peripheral
component interconnect devices includes a peripheral component interconnect expansion memory, and wherein the peripheral component
interconnect data within the peripheral component interconnect expansion memory includes a plurality of different microcodes
used to enable matching peripheral component interconnect devices within the plurality of different peripheral component interconnect
devices to execute;
caching the peripheral component interconnect device data to form cached peripheral component interconnect device data; and
configuring the cached peripheral component interconnect device data to enable the plurality of different peripheral component
interconnect devices included on the peripheral component interconnect card to execute.
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