| US 7,549,013 B2 | ||
| Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices | ||
| Petro Estakhri, Pleasanton, Calif. (US); and Berhanu Iman, Sunyvale, Calif. (US) | ||
| Assigned to Lexar Media, Inc., Fremont, Calif. (US) | ||
| Filed on Apr. 13, 2006, as Appl. No. 11/404,570. | ||
| Application 11/404570 is a continuation of application No. 10/832421, filed on Apr. 26, 2004, granted, now 7,111,140. | ||
| Application 10/832421 is a continuation of application No. 10/152969, filed on May 20, 2002, granted, now 6,728,851, filed on Apr. 27, 2004. | ||
| Application 10/152969 is a continuation of application No. 10/071972, filed on Feb. 05, 2002, granted, now 6,757,800, filed on Jun. 29, 2004. | ||
| Application 10/071972 is a continuation of application No. 09/705474, filed on Nov. 02, 2000, granted, now 6,397,314, filed on May 28, 2002. | ||
| Application 09/705474 is a continuation of application No. 09/487865, filed on Jan. 20, 2000, granted, now 6,202,138, filed on Mar. 13, 2001. | ||
| Application 09/487865 is a continuation of application No. 09/030697, filed on Feb. 25, 1998, granted, now 6,081,878, filed on Jun. 27, 2000. | ||
| Application 09/030697 is a continuation in part of application No. 08/946331, filed on Oct. 07, 1997, granted, now 5,930,815, filed on Jul. 27, 1999. | ||
| Application 08/946331 is a continuation in part of application No. 08/831266, filed on Mar. 31, 1997, granted, now 5,907,856, filed on May 25, 1999. | ||
| Application 08/831266 is a continuation in part of application No. 08/509706, filed on Jul. 31, 1995, granted, now 5,845,313, filed on Dec. 12, 1998. | ||
| Prior Publication US 2007/0266201 A1, Nov. 15, 2007 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 12/00 (2006.01); G06F 13/28 (2006.01) | ||
| U.S. Cl. 711—103 [711/5; 711/100; 711/154; 711/168] | 30 Claims |
| 1. A non-volatile memory system comprising:
memory control circuitry; and
a non-volatile memory unit coupled to the memory control circuitry and including one or more nonvolatile memory devices organized
into sectors, a sector including storage locations for a plurality of sectors of information, a sector of information including
user data and overhead, user data of a sector of information including even user data bytes and odd user data bytes and overhead
of a sector of information including even overhead bytes and odd overhead bytes, the memory control circuitry for programming
of even user data bytes and even overhead bytes of at least one of a plurality of sectors of information into a first sector
of a first non-volatile memory device and for programming the odd user data bytes and the odd overhead bytes of the at least
one of the plurality of sectors of information into a second sector of a second nonvolatile memory device and for programming
even user data bytes and even overhead bytes of at least another one of the plurality of sectors of information into the first
sector of the first nonvolatile memory device and for programming the odd user data bytes and the odd overhead bytes of the
at least another one of the plurality of sectors of information into the second sector of the second nonvolatile memory device,
wherein at least two sectors of information are programmed to at least two of the one or more non-volatile memory devices
simultaneously.
|