| US 7,548,098 B2 | ||
| Output buffer circuit and method with self-adaptive driving capability | ||
| Ignazio Martines, Tremestieri Etneo (Italy); and Michele La Placa, Cef Alu' (Italy) | ||
| Assigned to STMicroelectronics S.r.l., Agrate Brianza (MI) (Italy) | ||
| Filed on Mar. 13, 2007, as Appl. No. 11/717,853. | ||
| Prior Publication US 2007/0210839 A1, Sep. 13, 2007 | ||
| Int. Cl. H03B 21/00 (2006.01) | ||
| U.S. Cl. 327—112 [327/108] | 23 Claims |
| 1. An output buffer for providing a buffered current to a circuit load, the output buffer comprising:
a plurality of operative stages, each one for generating a current component of the buffered current; and
enabling means for selectively enabling each operative stage;
at least one auxiliary stage; and
control means for measuring a control current supplied by the at least one auxiliary stage, the control means operable to
cause the enabling means to selectively enable at least one operative stage according to the measured control current.
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