| US 7,547,943 B2 | ||
| Non-volatile memory devices that include a selection transistor having a recessed channel and methods of fabricating the same | ||
| Myoung-Kwan Cho, Gyeonggi-do (Korea, Republic of); Eun-Suk Cho, Gyeonggi-do (Korea, Republic of); and Wook-Hyun Kwon, Gyeonggi-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (Korea, Republic of) | ||
| Filed on Dec. 22, 2004, as Appl. No. 11/22,181. | ||
| Claims priority of application No. 10-2004-0031469 (KR), filed on May 04, 2004. | ||
| Prior Publication US 2006/0023558 A1, Feb. 02, 2006 | ||
| Int. Cl. H01L 29/94 (2006.01) | ||
| U.S. Cl. 257—326 [257/315; 257/316; 257/296; 257/E29.129; 257/E27.103; 365/185.01; 365/185.07; 365/185.11] | 10 Claims |
| 1. A NAND-type flash memory device, comprising:
an active region defined by a device isolation layer on a substrate, the active region having a pair of recessed regions spaced
apart from each other;
a ground selection transistor and a string selection transistor on the active region, each of the ground selection transistor
and the string selection transistor having a recessed channel along each of the recessed regions; and
a plurality of memory transistors on the active region between the ground selection transistor and the string selection transistor;
wherein each of the ground selection transistor and the string selection transistor has a source and a drain, and
wherein each of the recessed regions is disposed between the source and the drain, and has a depth that is greater than a
distance between the source and the drain.
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