| US 7,547,641 B2 | ||
| Super hybrid SOI CMOS devices | ||
| Meikei Ieong, Baoshan Township (Taiwan); and Qiqing C. Ouyang, Yorktown Heights, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Jun. 05, 2007, as Appl. No. 11/758,454. | ||
| Prior Publication US 2008/0303090 A1, Dec. 11, 2008 | ||
| Int. Cl. H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—739 [438/218; 438/481; 438/738; 438/740] | 4 Claims |

| 1. A method of forming a semiconductor structure comprising:
providing a hybrid orientated semiconductor substrate comprising a first active area having a first semiconductor surface
layer of a first crystallographic orientation located on a surface of a buried insulating material and a second active area
having a second semiconductor surface layer of a second crystallographic orientation located within said hybrid orientated
semiconductor substrate, wherein said first and second crystallographic orientations are different;
forming a trench isolation region located between said first and second active areas, said trench isolation region is filled
with a trench dielectric material;
forming a lithographically defined opening within said trench isolation region in a region that laterally abuts said second
semiconductor surface layer to expose sidewalls of said second semiconductor surface layer;
laterally etching at least an upper portion of a buffer layer that is present directly beneath said second semiconductor surface
layer forming a cavity which extends below said second semiconductor surface layer; and
filling said cavity and the lithographically defined opening within said trench isolation region with a dielectric material
that has a lower stress value than said trench dielectric material.
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