| US 7,546,440 B2 | ||
| Non-volatile memory devices and control and operation thereof | ||
| Vinod Lakhani, Palo Alto, Calif. (US); and Benjamin Louie, Fremont, Calif. (US) | ||
| Assigned to MOSAID Technologies Incorporated, Kanata (Canada) | ||
| Filed on Oct. 17, 2006, as Appl. No. 11/581,887. | ||
| Application 11/581887 is a continuation of application No. 10/199725, filed on Jul. 19, 2002, granted, now 7,123,512, filed on Oct. 17, 2006. | ||
| Prior Publication US 2007/0038800 A1, Feb. 15, 2007 | ||
| Int. Cl. G06F 9/34 (2006.01); G06F 12/10 (2006.01) | ||
| U.S. Cl. 711—206 [711/202; 711/103] | 20 Claims |
| 1. A method of operating a non-volatile memory redundant erase block control circuit, comprising:
programming a selected redirect entry in an erase block redirect look up table of a non-volatile memory redundant erase block
control circuit to redirect accesses from a first erase block in a first bank of a non-volatile memory array to a second erase
block in a second bank of the non-volatile memory array, wherein each bank of the non-volatile memory array contains a plurality
of general use erase blocks and redundant erase blocks;
receiving a memory access at the non-volatile memory redundant erase block control circuit wherein receiving the memory access
comprises receiving an extended memory address referencing the first erase block of the first bank of the non-volatile memory
array where the extended memory address allows general use access to available unutilized redundant erase blocks of each bank;
and
redirecting accesses from the first erase block of the first bank to the second erase block of the second bank by referencing
the selected redirect entry in the erase block redirect look up table; wherein the extended memory address comprises a first
portion uniquely addressing one of the general use erase blocks of the first bank of the non-volatile memory array and a second
portion allowing the general use access to available unutilized redundant erase blocks of each bank.
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