| US 7,545,686 B2 | ||
| Device for setting up a write current in an MRAM type memory and memory comprising | ||
| Jean Lasseuguette, Grenoble (France); Cyrille Dray, Eybens (France); and Sébastien Barasinski, Meylan (France) | ||
| Assigned to STMicroelectronics S.A., Montrouge (France) | ||
| Filed on Mar. 17, 2005, as Appl. No. 11/83,112. | ||
| Claims priority of application No. 04 02818 (FR), filed on Mar. 18, 2004. | ||
| Prior Publication US 2006/0050585 A1, Mar. 09, 2006 | ||
| Int. Cl. G11C 7/00 (2006.01); G11C 7/22 (2006.01) | ||
| U.S. Cl. 365—189.16 [365/158] | 12 Claims |
| 1. Device for setting up a write current to a plurality of write lines in an MRAM type integrated circuit memory, the device
comprising:
a current mirror comprising:
a first stage including a reference regulated cascode stage receiving all or part of the write current on an input of the
first stage; and
a second stage including a copy regulated cascode stage copying the write current to the plurality of write lines,
wherein the copy regulated cascode stage comprises a plurality of addressing MOS transistors for controlling the addressing
of the plurality of write lines,
wherein each addressing MOS transistor of the plurality of addressing MOS transistors is connected to a common MOS transistor
of the copy regulated cascode stage, a grid of which is connected to an output of the reference regulated cascode stage, said
common MOS transistor being designed to fix the value of the write current.
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