| US 7,544,572 B2 | ||
| Multi-operational mode transistor with multiple-channel device structure | ||
| James Pan, Fishkill, N.Y. (US); and John Pellerin, Hopewell Junction, N.Y. (US) | ||
| Assigned to Advanced Micro Devices, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Nov. 30, 2005, as Appl. No. 11/289,682. | ||
| Prior Publication US 2007/0122983 A1, May 31, 2007 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—283 [438/309; 438/166; 438/268; 257/E21.43] | 26 Claims |
| 1. A method of forming a semiconductor device, comprising the steps of: forming multiple adjacent channels;
doping each of the multiple adjacent channels with the same conductivity type;
forming a gate electrode on the multiple adjacent channels; and
independently adjusting the threshold voltage for each channel;
wherein the step of forming multiple channels includes forming a first gate dielectric, a first silicon channel on the first
gate dielectric, a second gate dielectric on the first silicon channel, a second silicon channel on the second date dielectric,
and a third gate dielectric on the second channel.
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