| US 7,544,551 B2 | ||
| Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius | ||
| Christof Streck, Coswig (Germany); Volker Kahlert, Dresden (Germany); and Alexander Hanke, Radebeul (Germany) | ||
| Assigned to Advanced Micro Devices, Inc., Austin, Tex. (US) | ||
| Filed on Aug. 18, 2006, as Appl. No. 11/465,592. | ||
| Claims priority of application No. 10 2005 051 994 (DE), filed on Oct. 31, 2005. | ||
| Prior Publication US 2007/0096194 A1, May 03, 2007 | ||
| Int. Cl. H01L 21/338 (2006.01) | ||
| U.S. Cl. 438—175 | 21 Claims |
| 1. A method, comprising:
forming, in a crystalline semiconductor layer comprising silicon, a crystalline structure on the basis of silicon and at least
one further atomic species having a covalent radius that is greater than a covalent radius of germanium in contact with the
crystalline semiconductor layer; and
using said crystalline structure to create strain in a first specified region of said semiconductor layer.
|