| US 7,544,538 B2 | ||
| Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same | ||
| Hyun-Soo Chung, Gyeonggi-do (Korea, Republic of); Seung-Kwan Ryu, Gyeonggi-do (Korea, Republic of); Ju-Il Choi, Gyeonggi-do (Korea, Republic of); Dong-Ho Lee, Gyeonggi-do (Korea, Republic of); and Seong-Deok Hwang, Seoul (Korea, Republic of) | ||
| Assigned to Samsung Electronic Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Jul. 09, 2007, as Appl. No. 11/775,120. | ||
| Claims priority of application No. 10-2006-0063936 (KR), filed on Jul. 07, 2006. | ||
| Prior Publication US 2008/0014735 A1, Jan. 17, 2008 | ||
| Int. Cl. H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01) | ||
| U.S. Cl. 438—106 [438/612; 438/613; 257/678; 257/737; 257/E21.499; 257/E21.502; 257/E21.503; 257/E21.508; 257/E21.511] | 15 Claims |
| 1. A method of fabricating a semiconductor chip, the method comprising:
preparing a semiconductor substrate comprising a chip region and a scribe line region;
forming a bonding pad on the chip region of the semiconductor substrate;
forming a protective layer to cover a portion of the semiconductor substrate, the protective layer exposing a portion of the
bonding pad and a portion of the scribe line region;
forming a redistribution pattern overlying the protective layer, the redistribution pattern electrically coupled to the exposed
portion of the bonding pad and covering the exposed scribe line region; and
removing a portion of the semiconductor substrate located below the redistribution pattern in the scribe line region to form
a semiconductor strut contacting the redistribution pattern.
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