| US 7,381,619 B2 | ||
| Dual work-function metal gates | ||
| Chih-Hao Wang, Hsin-chu (Taiwan); and Yu-Shen Lai, Hsin-Chu (Taiwan) | ||
| Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (Taiwan) | ||
| Filed on Apr. 27, 2004, as Appl. No. 10/832,679. | ||
| Prior Publication US 2005/0253173 A1, Nov. 17, 2005 | ||
| Int. Cl. H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—275 [438/216; 438/287; 257/E21.637] | 11 Claims |
| 1. A method of forming a semiconductor device, the method comprising:
forming respective gate dielectrics of the first transistor and the second transistor;
forming a first layer on the gate dielectrics;
nitridating the gate dielectric of the second transistor after the step of forming the first layer;
forming respective gate electrodes for the first transistor and the second transistor; and
after the step of nitridating, forming a suicide layer by annealing the semiconductor device, wherein the silicide layer is
formed between the gate electrode of the first transistor and the gate dielectric of the first transistor.
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