US 7,542,534 B2
Method and an apparatus to reduce electromagnetic interference
Gregory L. Ebert, Portland, Oreg. (US)
Assigned to Intel Corporation, Santa Clara, Calif. (US)
Filed on Sep. 27, 2005, as Appl. No. 11/237,042.
Prior Publication US 2007/0071151 A1, Mar. 29, 2007
Int. Cl. H04L 7/00 (2006.01)
U.S. Cl. 375—354 8 Claims
OG exemplary drawing
 
1. A method comprising:
using a first clock signal to create a second clock signal having a fundamental frequency lower than a frequency of the first clock signal, wherein the first clock signal is usable as a time reference for data transmission from a chip within a chip set to an interconnect;
outputting the second clock signal to the interconnect via a data channel of the chip as a forwarded clock signal;
redistributing signal power to the lower fundamental frequency to reduce electromagnetic interference (EMI) emission from the chip; and
alternating duty cycles of the second clock signal in consecutive sub-periods within a fundamental period of the second clock signal.