| US 7,542,483 B1 | ||
| Recoverable reference clock architecture for SONET/SDH and ethernet mixed bidirectional applications | ||
| Roberto Gianella, Milan (Italy); Marco De Angeli, Barzana (Italy); Marco Portinari, Bresso (Italy); and Thomas Hamilton, Milpitas, Calif. (US) | ||
| Assigned to Cisco Technology, Inc., San Jose, Calif. (US) | ||
| Filed on Jun. 25, 2003, as Appl. No. 10/603,699. | ||
| Int. Cl. H04J 3/06 (2006.01) | ||
| U.S. Cl. 370—503 [370/350] | 14 Claims |
| 1. A method for operating a line-card having a transponder and a transceiver for an asynchronous data transmission standard
to relay data in accordance with a synchronous data transmission standard, said method comprising:
receiving a remotely transmitted signal formatted in accordance with said synchronous data transmission standard by said transponder;
recovering a clock signal from said remotely transmitted signal by said transponder;
in a first mode, directing said recovered clock signal to a clock input of said transceiver;
in a second mode, directing a locally generated clock to said clock input of said transceiver;
switching from said first mode to said second mode upon loss of said remotely transmitted signal or upon loss of recovered
framing in said remotely transmitted signal;
during said first mode, filtering said clock input using a phase lock loop operating at a first (fast) time constant; and
when switching from said second mode to said first mode, filtering said clock input using said phase lock loop operating at
a second time constant, said second time constant being shorter than said first time constant.
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