| US 7,542,304 B2 | ||
| Memory expansion and integrated circuit stacking system and method | ||
| Russell Rapport, Austin, Tex. (US); James W. Cady, Austin, Tex. (US); James Wilder, Austin, Tex. (US); David L. Roper, Austin, Tex. (US); James Douglas Wehrly, Jr., Austin, Tex. (US); and Jeff Buchle, Austin, Tex. (US) | ||
| Assigned to Entorian Technologies, LP, Austin, Tex. (US) | ||
| Filed on Mar. 19, 2004, as Appl. No. 10/804,452. | ||
| Application 10/804452 is a continuation of application No. PCT/US03/29000, filed on Sep. 15, 2003. | ||
| Prior Publication US 2005/0057911 A1, Mar. 17, 2005 | ||
| Int. Cl. H01R 9/00 (2006.01) | ||
| U.S. Cl. 361—776 [257/738] | 17 Claims |
| 1. A high-density circuit module comprising:
a first CSP having an upper and a lower major surface and a set of CSP contacts along the lower major surface;
a second CSP having first and second lateral edges and upper and lower major surfaces and a set of CSP contacts along the
lower major surface, the first and second lateral edges delineating an extent of the upper major surface of the second CSP;
a form standard that is provided as a rigid mandrel and that is initially disposed above the upper surface of the second CSP,
the form standard defining a standard sized form and including a thermally conductive material; and
a flex circuit that is at least partially disposed about the form standard subsequent to the form standard being disposed
above the upper surface of the second CSP, the form standard defining a cross-sectional shape of the flex circuit.
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