| US 7,541,947 B2 | ||
| Semiconductor devices, a system including semiconductor devices and methods thereof | ||
| Seung-Jun Bae, Daejeon (Korea, Republic of); Seong-Jin Jang, Seongnam-si (Korea, Republic of); Kwang-II Park, Yongin-si (Korea, Republic of); and Woo-Jin Lee, Seongnam-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (Korea, Republic of) | ||
| Filed on May 25, 2007, as Appl. No. 11/802,886. | ||
| Claims priority of application No. 10-2006-0047857 (KR), filed on May 27, 2006. | ||
| Prior Publication US 2007/0290902 A1, Dec. 20, 2007 | ||
| Int. Cl. H03M 7/00 (2006.01) | ||
| U.S. Cl. 341—60 [341/58; 341/61; 341/95; 714/759; 714/777; 714/793; 714/802; 375/286; 375/294] | 21 Claims |
| 1. A method of reducing noise, comprising:
receiving first parallel data, the first parallel data including a first plurality of bits arranged in a first order;
scrambling the first plurality of bits included among the first parallel data to obtain second parallel data having the first
plurality of bits arranged in a second order; and
generating a balance code having a second plurality of bits by adding at least one additional bit to the first plurality of
bits and adjusting a logic level of at least one of the first plurality of bits such that a difference between a first number
of the second plurality of bits equal to a first logic level and a second number of the second plurality of bits equal to
a second logic level is below a threshold.
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