| US 7,541,657 B2 | ||
| Semiconductor device and method for manufacturing the same | ||
| Masato Koyama, Miura-gun (Japan); Akira Nishiyama, Yokohama (Japan); Yoshinori Tsuchiya, Yokohama (Japan); and Reika Ichihara, Tokyo (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Jun. 05, 2008, as Appl. No. 12/133,583. | ||
| Application 12/133583 is a continuation of application No. 11/235246, filed on Sep. 27, 2005, granted, now 7,429,776. | ||
| Claims priority of application No. 2005-059396 (JP), filed on Mar. 03, 2005. | ||
| Prior Publication US 2008/0258230 A1, Oct. 23, 2008 | ||
| Int. Cl. H01L 29/78 (2006.01) | ||
| U.S. Cl. 257—407 [257/412] | 15 Claims |
| 1. A semiconductor device comprising:
a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type
semiconductor layer, and a first gate electrode formed on the first gate insulating layer and in which the first gate electrode
includes a carbon compound layer adjacent to the first gate insulating layer; and
an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type
semiconductor layer, and a second gate electrode formed on the second gate insulating layer,
wherein the carbon compound layer is comprised of one of Ta carbide and W carbide, and the first and second gate electrodes
contain the same metal.
|