US 7,539,888 B2
Message buffer for a receiver apparatus on a communications bus
Carl C. Hu, Carmel, Ind. (US); and Kim R. Gauen, Noblesville, Ind. (US)
Assigned to Freescale Semiconductor, Inc., Austin, Tex. (US)
Filed on Mar. 31, 2006, as Appl. No. 11/395,781.
Prior Publication US 2007/0230484 A1, Oct. 04, 2007
Int. Cl. G06F 1/32 (2006.01)
U.S. Cl. 713—324  [713/320] 10 Claims
OG exemplary drawing
 
1. A system within a node of a multiplexed communication system, wherein the node includes a controller for communication over a multiplexed bus, the system comprising:
a transceiver coupled to a bus configured for receiving and transmitting messages over the bus;
a message buffer for storing one or more messages received by the transceiver;
a power interface that generates a power control signal suitable for coupling to a controller, wherein the controller enters a power-on state in response to the power control signal; and
a controller interface suitable for coupling to a communication bus coupled to the controller providing communication between the message buffer and the controller, wherein the controller interface is configured to transfer a message stored in the message buffer to the controller;
wherein the controller interface is configured to send, in response to validating a received message for the controller, a request via the controller interface that the controller wake-up.