| US 7,539,846 B2 | ||
| SIMD processor with a subroutine control unit | ||
| Alberto Canella, Villach (Austria); Paul Fugger, Graz (Austria); and Gerhard Nossing, Villach (Austria) | ||
| Assigned to Infineon Technologies AG, Munich (Germany) | ||
| Filed on Aug. 30, 2002, as Appl. No. 10/232,152. | ||
| Claims priority of application No. 101 44 904 (DE), filed on Sep. 12, 2001. | ||
| Prior Publication US 2003/0097542 A1, May 22, 2003 | ||
| Int. Cl. G06F 15/00 (2006.01); G06F 15/76 (2006.01) | ||
| U.S. Cl. 712—22 | 8 Claims |
| 1. A method for controlling a digital signal single instruction multiple data (SIMD) processor, having a number of arithmetic
units the method comprising:
(a) processing one program simultaneously on each of a number of arithmetic units so that a number of data streams are processed
in parallel,
(b) reading and evaluating flags which are specific to specific arithmetic units,
(c) switching off the arithmetic units whose associated flag is not set and calling a subroutine by the program, which is
carried out by the arithmetic units whose flag is set, if at least one of the flags is set,
(d) switching on the arithmetic units which have been switched off once the subroutine has been processed, and
(e) refraining from calling the subroutine and refraining from switching off the arithmetic units if none of the flags are
set.
|