| US 7,538,037 B2 | ||
| Method for manufacturing semiconductor device | ||
| Akihiro Takase, Oita (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Aug. 17, 2007, as Appl. No. 11/889,865. | ||
| Claims priority of application No. 2006-224318 (JP), filed on Aug. 21, 2006. | ||
| Prior Publication US 2008/0045024 A1, Feb. 21, 2008 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 438—702 [438/633; 438/639] | 20 Claims |
| 1. A method for manufacturing a semiconductor device, the method comprising:
forming a predetermined structure including a first inorganic insulating film covering a copper interconnection, an organic
insulating film formed above the first inorganic insulating film and having a hole pattern, and a second inorganic insulating
film formed above the organic insulating film and having a trench pattern;
dry etching the first inorganic insulating film by an etching gas containing a fluorocarbon family gas, using the organic
insulating film having the hole pattern as a mask, to form a through-hole reaching the copper interconnection; and
performing a plasma treatment using a mixed gas of an oxygen gas and a hydrocarbon gas, thereby removing fluorine remaining
on a surface of the copper interconnection exposed by the through-hole, and thereby dry etching the organic insulating film
using the second inorganic insulating film having the trench pattern as a mask.
|