| US 7,538,031 B2 | ||
| Method of manufacturing a wiring substrate and an electronic instrument | ||
| Noboru Uehara, Okaya (Japan); Tsuyoshi Shintate, Matsuyama (Japan); and Kazuaki Sakurada, Suwa (Japan) | ||
| Assigned to Seiko Epson Corporation, (Japan) | ||
| Filed on Sep. 26, 2005, as Appl. No. 11/235,645. | ||
| Claims priority of application No. 2004-282221 (JP), filed on Sep. 28, 2004. | ||
| Prior Publication US 2006/0068525 A1, Mar. 30, 2006 | ||
| Int. Cl. H01L 21/44 (2006.01) | ||
| U.S. Cl. 438—660 [438/676; 438/686] | 16 Claims |
| 1. A method of manufacturing a wiring substrate having a wiring layer formation step that comprises:
a first surface processing step in which surface processing is performed on a film formation area of a substrate;
a wiring formation step in which a wiring pattern is formed by placing a first liquid material on the film formation area
so that a plurality of gaps is formed in the wiring pattern;
a second surface processing step in which surface processing is once again performed on the film formation area; and
an insulating film formation step in which an insulating film is formed by placing a second liquid material in the gaps in
the wiring pattern, wherein
an affinity between the second liquid material and the film formation area in the insulating film formation step is greater
than an affinity between the first liquid material and the film formation area in the wiring formation step.
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