| US 7,538,019 B2 | ||
| Forming compliant contact pads for semiconductor packages | ||
| Qing Zhou, Chandler, Ariz. (US); Wei Shi, Gilbert, Ariz. (US); Daoqiang Lu, Chandler, Ariz. (US); and Jiangqi He, Gilbert, Ariz. (US) | ||
| Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
| Filed on Dec. 12, 2005, as Appl. No. 11/301,174. | ||
| Prior Publication US 2007/0132106 A1, Jun. 14, 2007 | ||
| Int. Cl. H01L 21/44 (2006.01) | ||
| U.S. Cl. 438—612 [438/614; 438/619; 438/790; 257/E21.259] | 19 Claims |
| 1. A method comprising:
forming a compliant layer on a substrate surface of a semiconductor package by applying a compliant material including a sacrificial
portion mixed with the compliant material on the substrate surface, and thermally decomposing the sacrificial portion so that
the compliant layer includes air gaps, the substrate surface including a plurality of conductive pads;
patterning the compliant layer to expose a portion of each of the plurality of conductive pads; and
forming a conductive layer over the patterned compliant layer and the exposed portion of each of the plurality of conductive
pads, including sputtering a seed layer over the patterned compliant layer and the exposed portion of each of the plurality
of conductive pads, and electroplating a second layer on the seed layer.
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