| US 7,537,993 B2 | ||
| Methods of forming semiconductor devices having tunnel and gate insulating layers | ||
| Chul-sung Kim, Gyeonggi-do (Korea, Republic of); Young-jin Noh, Gyeonggi-do (Korea, Republic of); Bon-young Koo, Gyeonggi-do (Korea, Republic of); and Sung-kweon Baek, Gyeonggi-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., (Korea, Republic of) | ||
| Filed on Jul. 11, 2007, as Appl. No. 11/776,297. | ||
| Claims priority of application No. 10-2006-0091967 (KR), filed on Sep. 21, 2006. | ||
| Prior Publication US 2008/0073693 A1, Mar. 27, 2008 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—257 [438/258] | 12 Claims |
| 1. A method of forming a semiconductor device, comprising:
providing a semiconductor substrate including a surface;
forming buried isolation regions that protrude from the surface of the semiconductor substrate, and forming a first insulating
layer on the semiconductor substrate between the isolation regions;
forming a conductive layer on the first insulating layer and the isolation regions so that the conductive layer is on the
first insulating layer in a space between the isolation regions;
implanting impurity ions including fluorine, nitrogen, heavy hydrogen, and/or oxygen into the first insulating layer through
the conductive layer; and
removing a portion of an upper region of the conductive layer.
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