US 7,537,883 B2
Method of manufacturing nano size-gap electrode device
Han Young Yu, Daejeon (Korea, Republic of); In Bok Baek, Cheongju-si (Korea, Republic of); Chang Geun Ahn, Daejeon (Korea, Republic of); Ki Ju Im, Daejeon (Korea, Republic of); Jong Heon Yang, Daejeon (Korea, Republic of); Ung Hwan Pi, Daejeon (Korea, Republic of); Min Ki Ryu, Seoul (Korea, Republic of); Chan Woo Park, Daejeon (Korea, Republic of); Sung Yool Choi, Daejeon (Korea, Republic of); and Seong Jae Lee, Daejeon (Korea, Republic of)
Assigned to Electronics and Telecommunications Research Institute, Daejeon (Korea, Republic of)
Filed on Jun. 06, 2006, as Appl. No. 11/447,820.
Claims priority of application No. 10-2005-0091288 (KR), filed on Sep. 29, 2005.
Prior Publication US 2007/0072336 A1, Mar. 29, 2007
Int. Cl. G03F 7/00 (2006.01); H01L 51/40 (2006.01); C25D 5/18 (2006.01)
U.S. Cl. 430—313  [430/311; 430/314; 430/317; 430/319] 11 Claims
OG exemplary drawing
 
1. A method of manufacturing a nano size-gap electrode device, comprising the steps of:
disposing a floated nano structure on a semiconductor layer;
forming a mask layer having at least one opening pattern across the nano structure; and
depositing a metal on the semiconductor layer exposed through the opening pattern to form at least a pair of electrodes having a nano size-gap between the pair of electrodes such that the nano size-gap is formed under the nano structure.