| US 7,533,306 B2 | ||
| Turbo decoding apparatus and interleave-deinterleave apparatus | ||
| Kazuhisa Obuchi, Kawasaki (Japan); Tetsuya Yano, Kawasaki (Japan); Kazuo Kawabata, Kawasaki (Japan); and Takaharu Nakamura, Kawasaki (Japan) | ||
| Assigned to Fujitsu Limited, Kawasaki (Japan) | ||
| Filed on Dec. 07, 2005, as Appl. No. 11/296,678. | ||
| Application 10/352515 is a division of application No. 09/823564, filed on Mar. 30, 2001, granted, now 6,547,766. | ||
| Application 11/296678 is a continuation of application No. 10/352515, filed on Jan. 28, 2003, granted, now 6,993,699. | ||
| Application 09/823564 is a continuation of application No. PCT/JP99/00934, filed on Feb. 26, 1999. | ||
| Prior Publication US 2006/0107163 A1, May 18, 2006 | ||
| Int. Cl. H03M 13/27 (2006.01) | ||
| U.S. Cl. 714—701 | 3 Claims |
| 1. An interleave-deinterleave apparatus comprising:
an interleave/deinterleave memory unit that performs both interleave and deinterleave operations during turbo decoding;
a pair of address selecting units, one selecting unit selectively connecting outputs of an address generating unit as a writing
address of said interleave/deinterleave memory unit and another selecting unit connecting outputs of an address generating
unit as a reading address for said interleave/deinterleave memory unit; and
an address selection control unit for controlling the pair of address selecting units to effect operation of the interleave/deinterleave
memory unit as an interleaver and a deinterleaver in a time divisional manner.
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