US 7,533,293 B2
Systems and methods for CPU repair
Jeff Barlow, Roseville, Calif. (US); Jeff Brauch, Fort Collins, Colo. (US); Howard Calkin, Roseville, Calif. (US); Raymond Gratias, Fort Collins, Colo. (US); Stephen Hack, Fort Collins, Colo. (US); Lacey Joyal, Fort Collins, Colo. (US); Guy Kuntz, Richardson, Tex. (US); Ken Pomaranski, Roseville, Calif. (US); and Michael Sedmak, Fort Collins, Colo. (US)
Assigned to Hewlett-Packard Development Company, L.P., Houston, Tex. (US)
Filed on Feb. 17, 2006, as Appl. No. 11/356,564.
Claims priority of provisional application 60/654255, filed on Feb. 18, 2005.
Prior Publication US 2006/0248313 A1, Nov. 02, 2006
Int. Cl. G06F 11/00 (2006.01)
U.S. Cl. 714—8  [714/710] 8 Claims
OG exemplary drawing
 
1. A method for repairing a computer system having an operating system comprising the steps of:
monitoring at least one cache element associated with at least one CPU for at least one cache error;
recording cache error information associated with said at least one cache error;
determining whether said at least one cache element is faulty based on said cache error information;
de-allocating said at least one CPU if said at least one cache element is faulty;
determining if at least one spare cache element is available if said at least one cache element is faulty;
generating a system reboot;
reading cache fuse data during said system reboot; and
swapping in said at least one spare cache element if said at least one spare cache element is available and said at least one cache element is faulty during said system reboot.