| US 7,532,726 B2 | ||
| Encryption/decryption device and method, encryption device and method, decryption device and method, and transmission/reception apparatus | ||
| Toshihiko Fukuoka, Osaka (Japan); and Taemi Wada, Osaka (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Appl. No. 10/523,720 PCT Filed Aug. 08, 2003, PCT No. PCT/JP03/10186 § 371(c)(1), (2), (4) Date Feb. 07, 2005, PCT Pub. No. WO2004/015916, PCT Pub. Date Feb. 19, 2004. |
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| Claims priority of application No. 2002-231284 (JP), filed on Aug. 08, 2002. | ||
| Prior Publication US 2005/0286720 A1, Dec. 29, 2005 | ||
| Int. Cl. H04L 9/28 (2006.01); H04L 9/00 (2006.01); G06F 11/30 (2006.01) | ||
| U.S. Cl. 380—255 [380/28; 380/29; 713/150; 713/189] | 13 Claims |

| 1. An encryption/decryption device comprising:
a data structure analysis block for receiving encrypted data or data to be encrypted, analyzing the structure of the data
and outputting information related to encryption as control data, the data structure analysis block also outputting the encrypted
data or the data to be encrypted as processing block input data;
a data control block for outputting an encryption/decryption switch signal indicating which one of encryption and decryption
should be performed, and a mode selection signal indicating in which mode the processing block input data should be processed,
according to the control data; and
a shared processing block configured to have the ability to perform encryption and decryption in either of the Cipher Block
Chaining (CBC) mode and the Cipher Feedback (CFB) mode by performing Electronic Code Book (ECB) processing using input key
data, the shared processing block performing encryption or decryption according to the encryption/decryption switch signal
for the processing block input data in the mode indicated by the mode selection signal, and outputting encrypted result or
decrypted result,
wherein the shared processing block comprises:
an ECB processor for performing the ECB processing and outputting the result as cipher-processed data;
a first selector for selecting one of the processing block input data and the cipher-processed data according to the encryption/decryption
switch signal and the mode selection signal, and outputting the selected data;
a delay device for delaying the processing block input data and the cipher-processed data received as inputs and outputting
the delayed data;
a second selector for selecting one of the processing block input data, initial vector data, and the delayed processing block
input data and the delayed cipher-processed data output from the delay device according to the encryption/decryption switch
signal and the mode selection signal, and outputting the selected data;
an XOR operator for computing XOR of the output of the first selector and the output of the second selector and outputting
the computed result;
a third selector for selecting one of the processing block input data, the output of the XOR operator, the delayed processing
block input data and the delayed cipher-processed data according to the encryption/decryption switch signal and the mode selection
signal, and outputting the selected data;
a bit mask device for masking part of the key data as required according to the mode selection signal and outputting the result
as mode-adaptive key data; and
a fourth selector for selecting one of the cipher-processed data and the output of the XOR operator according to the encryption/decryption
switch signal and the mode selection signal, and outputting the selected data as the encrypted result or the decrypted result,
and
the ECB processor performs either encryption or decryption as the ECB processing for the output of the third selector using
the mode-adaptive key data according to the encryption/decryption switch signal and the mode selection signal, and outputs
the result as the cipher-processed data.
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