US 7,532,138 B2
Delta-sigma modulator and DA converter apparatus including delta-sigma modulator changing order of filter
Taiji Akizuki, Miyagi (Japan); Tomoaki Maeda, Kyoto (Japan); and Masahiko Sagisaka, Osaka (Japan)
Assigned to Panasonic Corporation, Osaka (Japan)
Filed on Feb. 21, 2008, as Appl. No. 12/35,344.
Claims priority of application No. 2007-040850 (JP), filed on Feb. 21, 2007.
Prior Publication US 2008/0198050 A1, Aug. 21, 2008
Int. Cl. H03M 3/00 (2006.01)
U.S. Cl. 341—143  [341/155] 13 Claims
OG exemplary drawing
 
1. A delta-sigma modulator comprising:
a first subtractor for subtracting an inputted second input signal from an inputted first input signal, and outputting an analog signal representing a subtraction result of the first subtractor;
a first integrator for integrating the analog signal outputted from the first subtractor, and outputting an integrated analog signal;
a second subtractor for subtracting a sum of an inputted third analog signal and an inputted fourth analog signal from the analog signal outputted from the first integrator, and outputting an analog signal representing a subtraction result of the second subtractor;
a second integrator integrating the analog signal outputted from the second subtractor, and outputting an integrated analog signal;
a quantizer for quantizing the analog signal outputted from the second integrator into a digital signal, and outputting the digital signal;
a DA converter for DA-converting the digital signal outputted from the quantizer into an analog signal, and outputting the analog signal;
a first feedback circuit including a plurality of first charge holding circuits for holding electric charges of the analog signal outputted from the DA converter for different sampling intervals, respectively, the first feedback circuit capable of changing a feedback amount of the analog signal outputted from the DA converter, and outputting the analog signal from each of the first charge holding circuits to the second subtractor as a third analog signal;
a second feedback circuit including a plurality of second charge holding circuits for holding electric charges of the analog signal outputted from the second integrator for different sampling intervals, respectively, the second feedback circuit capable of changing a feedback amount of the analog signal outputted from the second integrator, and outputting an analog signal from each of the second charge holding circuits to the second subtractor as a fourth analog signal, and
a controller for switching an order of a filter of a filter characteristic of the delta sigma modulator by changing feedback amounts of the first and second feedback circuits.