| US 7,532,061 B2 | ||
| Charge-pump type, voltage-boosting device with reduced ripple, in particular for non-volatile flash memories | ||
| Giancarlo Ragone, Vico III Micare, 43, Roccella Jonica 89047 (Italy); Miriam Sangalli, Via XXV Aprile, 11D, Carugate 20061 (Italy); Luca Crippa, Via Manzoni, 66, Busnago 20040 (Italy); and Rino Micheloni, Via Luini, 11, Turate 22078 (Italy) | ||
| Filed on May 19, 2006, as Appl. No. 11/437,268. | ||
| Claims priority of application No. 05425348 (EP), filed on May 20, 2005. | ||
| Prior Publication US 2007/0069801 A1, Mar. 29, 2007 | ||
| Int. Cl. G05F 1/10 (2006.01); G05F 3/02 (2006.01) | ||
| U.S. Cl. 327—536 | 17 Claims |
| 1. A voltage-boosting device, comprising:
a supply input configured to receive a supply voltage;
a high-voltage output configured to output an output voltage;
a plurality of sets of charge-pump stages series-connected between said supply input and said high-voltage output, each set
of charge-pump stages having a plurality of charge-pump stages and a respective enabling input receiving a respective one
of plural enabling signals, such that the charge-pump stages of the set are coupled to, and controlled by, the same enabling
signal, and each set of charge-pump stages is activated by the respective enabling signal independently of the other sets
of the plurality of sets; and
a control circuit coupled to said high-voltage output and configured to generate said enabling signals, said control circuit
including a plurality of comparators coupled to said high-voltage output, each of the comparators receiving a respective one
of a plurality of reference voltages, said comparators each configured to generate a respective one of the enabling signals
for said sets of charge-pump stages, each set of charge-pump stages being coupled respectively to a respective comparator
of the comparators;
wherein each set of stages comprises:
a respective enabling circuit including a timing input receiving a clock signal; and
a switch element connected between said timing input and the charge-pump stages of the set, said switch element having a control
input which receives the respective enabling signal for the set, such that when the switch element is activated by the respective
enabling signal, the switch element supplies the clock signal to all of the charge-pump stages of the set; and
wherein each enabling circuit comprises a latch arranged between said respective switch element and the charge-pump stages
of the set that includes the enabling circuit.
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