| US 7,531,871 B2 | ||
| Power semiconductor switching element | ||
| Ichiro Omura, Yokohama (Japan); Wataru Saito, Kawasaki (Japan); Tsuneo Ogura, Kamakura (Japan); Hiromichi Ohashi, Yokohama (Japan); Yoshihiko Saito, Yokosuka (Japan); and Kenichi Tokano, Kawasaki (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Kawasaki-shi (Japan) | ||
| Filed on Dec. 05, 2005, as Appl. No. 11/293,301. | ||
| Application 11/293301 is a division of application No. 10/770014, filed on Feb. 03, 2004, granted, now 7,067,870. | ||
| Application 10/770014 is a division of application No. 09/892545, filed on Jun. 28, 2001, granted, now 6,750,508, filed on Jun. 15, 2004. | ||
| Claims priority of application No. 2000-200130 (JP), filed on Jun. 30, 2000; and application No. 2001-144730 (JP), filed on May 15, 2001. | ||
| Prior Publication US 2006/0145230 A1, Jul. 06, 2006 | ||
| Int. Cl. H01L 29/94 (2006.01) | ||
| U.S. Cl. 257—328 [257/300; 257/301; 257/302; 257/329; 257/330; 257/331; 257/332; 257/500; 257/501; 257/502; 257/E29.013; 257/E29.021; 257/E29.027; 257/E29.066; 257/E29.133] | 8 Claims |
| 1. A semiconductor element comprising:
a semiconductor substrate of a first conductivity type having a first major surface and a second major surface opposing the
first major surface;
a drift layer of the first conductivity type formed on the first major surface of said semiconductor substrate;
a well layer of a second conductivity type selectively formed in a upper surface of said drift layer;
a source layer of the first conductivity type selectively formed in a upper surface of said well layer;
a trench formed to reach an inside of said semiconductor substrate from an upper surface of said source layer through said
well layer and said drift layer;
a buried electrode formed in said trench through a first insulating film;
a control electrode formed on the uppermost surface of said drift layer, and the uppermost surface of said well layer through
a second insulating film;
a first main electrode formed on the second major surface of said semiconductor substrate; and
a second main electrode connected to said source layer and said well layer, a part of the first insulating film being formed
between an upper surface of the buried electrode and a bottom surface of the second main electrode and being directly contacted
with the bottom surface of the second main electrode.
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