| US 7,531,853 B2 | ||
| Semiconductor device and manufacturing method of the same | ||
| Shinichi Saito, Kawasaki (Japan); Digh Hisamoto, Kokubunji (Japan); Yoshinobu Kimura, Tokyo (Japan); Nobuyuki Sugii, Tokyo (Japan); and Ryuta Tsuchiya, Hachioji (Japan) | ||
| Assigned to Hitachi, Ltd., Tokyo (Japan) | ||
| Filed on May 09, 2007, as Appl. No. 11/746,230. | ||
| Claims priority of application No. 2006-159239 (JP), filed on Jun. 08, 2006. | ||
| Prior Publication US 2007/0284582 A1, Dec. 13, 2007 | ||
| Int. Cl. H01L 29/80 (2006.01); H01L 31/112 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/00 (2006.01) | ||
| U.S. Cl. 257—272 [257/397; 257/627; 257/E27.06; 257/E27.062] | 2 Claims |
| 1. A semiconductor device including a p-type field-effect transistor, comprising:
a formation region of the p-type field-effect transistor, surrounded by a first STI, and formed of a semiconductor substrate
with a plane direction of a surface being a (100) surface;
a second STI surrounded by the formation region of the p-type field-effect transistor and separated from the first STI; and
a gate electrode provided so as to run upon the second STI, and to cross the formation region of the p-type field-effect transistor
in a <010> direction,
wherein a direction of a channel formed on a surface of the formation region of the p-type field-effect transistor under the
gate electrode is set as a <100> direction.
|