US 7,531,442 B2
	Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processing
Jayanthi Pallinti, Santa Clara, Calif. (US); Dilip Vijay, Redwood City, Calif. (US); Hemanshu Bhatt, Vancouver, Wash. (US); Sey-Shing Sun, Portland, Oreg. (US); Hong Ying, Cupertino, Calif. (US); Chiyi Kao, San Jose, Calif. (US); Peter Burke, Portland, Oreg. (US); Ramaswamy Ranganathan, Saratoga, Calif. (US); and Qwai Low, Cupertino, Calif. (US)
Assigned to LSI Corporation, Milpitas, Calif. (US)
Filed on Nov. 30, 2005, as Appl. No. 11/290,087.
Prior Publication US 2007/0123024 A1, May 31, 2007
Int. Cl. H01L 21/44 (2006.01)

U.S. Cl. 438—613  [438/614; 438/637; 438/666]

4 Claims

1. A method for reducing or eliminating IMC cracking issues in wire bonded parts, said method comprising at least one of the following: using a material having a compressive value greater than −2.7 E9 for at least one of the top, R1, and R2 layers; using a low K film having a compressive value of at least −2.7 E9; using for the R layer, a material which has a thickness of at least 8000 Å and has a density of at least 50%; using a deposition temperature of no more than 350 degrees Celsius for TEOS or silane films, and using an anneal temperature of no more than 300 degrees Celsius.