US 7,526,053 B1
Sequence detector using viterbi algorithm with soft output error correction
Peter J. Sallaway, San Diego, Calif. (US); and Sreen Raghavan, La Jolla, Calif. (US)
Assigned to National Semiconductor Corporation, Santa Clara, Calif. (US)
Filed on Sep. 08, 2006, as Appl. No. 11/517,435.
Application 11/044537 is a division of application No. 09/560109, filed on Apr. 28, 2000, granted, now 7,050,517.
Application 11/517435 is a continuation of application No. 11/044537, filed on Jan. 27, 2005, abandoned.
Int. Cl. H04B 1/10 (2006.01); H03D 1/00 (2006.01)
U.S. Cl. 375—350  [375/341; 714/795] 56 Claims
OG exemplary drawing
 
1. An electronic circuit comprising a sequence detector for converting a sequence of digital values of a detector input signal into a sequence of symbols chosen from an alphabet of predefined symbols, each of a plurality of states of the sequence detector defined by at least one of the predefined symbols, the sequence detector comprising:
a branch metric generator for generating branch metrics during multiple time periods which each progressively become the kth time period where k is a running integer, each branch metric being a measure of how much one of the digital values differs from a transition value to one of the states at the kth time period along an allowable path from one of the states at the (k−1)th time period;
comparison circuitry (a) for determining best and second-best state metrics, each best or second-best state metric respectively being the best or second best of a set of state-metric computations for a particular state at the kth time period where each state-metric computation depends on the state metric for a state at the (k−1)th time period and the branch metric for a transition from that state to the particular state at the kth time period and (b) for generating best and second-best comparison results, each best or second-best comparison result indicating which state at the (k−1)th time period is the state in the state-metric computation that respectively constitutes the best or second-best state metric for a state at the kth time period; and
symbol generation circuitry for utilizing the best comparison results and, as necessary, the second-best comparison results in generating a final sequence of the predefined symbols such that the final sequence approximates, as a sequence, the sequence of digital values.