| US 7,525,831 B2 | ||
| Method for improving sensing margin of electrically programmable fuses | ||
| Darren L. Anand, Essex Junction, Vt. (US); Gregory J. Fredeman, Wappingers Falls, N.Y. (US); Toshiaki Kirihata, Poughkeepsie, N.Y. (US); Alan J. Leslie, Wappingers Falls, N.Y. (US); and John M. Safran, Wappingers Falls, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Oct. 05, 2007, as Appl. No. 11/868,046. | ||
| Application 11/868046 is a continuation of application No. 11/460464, filed on Jul. 27, 2006, granted, now 7,307,911. | ||
| Prior Publication US 2008/0025071 A1, Jan. 31, 2008 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G11C 11/00 (2006.01) | ||
| U.S. Cl. 365—148 [365/189.07; 365/201; 365/205; 365/207; 365/225.7] | 7 Claims |
| 1. A method for determining the state of a programmable resistive memory element of a semiconductor device, the method comprising:
passing a first level of current through a fuse leg and a reference resistance leg of a test circuit including the programmable
resistive memory element;
detecting a differential signal developed between a reference node and a fuse node of the test circuit as a result of the
first level of current;
passing a second level of current through the fuse leg and the reference leg of a test circuit, the second level of current
being higher than the first level of current so as to enable detection of trip resistance of the test circuit at a lower value
than with respect to the first level of current; and
detecting a differential signal developed between the reference node and the fuse node of the test circuit as a result of
the second level of current.
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