| US 7,525,746 B1 | ||
| DC-offset compensation loops for magnetic recording system | ||
| Mats Oberg, Cupertino, Calif. (US) | ||
| Assigned to Marvell International Ltd., Hamilton (Bermuda) | ||
| Filed on Aug. 08, 2007, as Appl. No. 11/836,050. | ||
| Application 11/463278 is a division of application No. 10/737648, filed on Dec. 15, 2003, granted, now 7,116,504, filed on Oct. 03, 2006. | ||
| Application 11/836050 is a continuation of application No. 11/463278, filed on Aug. 08, 2006, granted, now 7,262,928. | ||
| Claims priority of provisional application 60/457613, filed on Mar. 25, 2003. | ||
| Claims priority of provisional application 60/472073, filed on May 20, 2003. | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G11B 20/10 (2006.01) | ||
| U.S. Cl. 360—39 [360/46; 327/307; 375/319; 375/341; 375/350] | 57 Claims |
| 1. An apparatus for removing dc offset from a digital signal, the apparatus comprising:
a first detector responsive to a corrected digital signal, wherein the first detector provides a first output comprising binary
signals and a second output comprising a substantially error free detector input;
a circuit to produce an error signal, wherein the error signal is the difference between the second output and the sum of
an uncorrected digital signal and a dc offset correction signal, wherein the uncorrected digital signal is delayed by a first
amount; and
a dc offset correction feedback loop responsive to a first loop input and a second loop input, the dc offset correction feedback
loop further comprising a loop filter;
wherein the dc offset correction signal is the output of the dc offset correction feedback loop,
wherein the first loop input is the error signal,
wherein the second loop input is one of the corrected digital signal, the uncorrected digital signal, or the first output,
and
wherein the dc offset correction signal is added to the digital signal to provide the corrected digital signal.
|