| US 7,525,512 B2 | ||
| Testing and inspecting method of a plasma display panel | ||
| Tsuneo Ikura, Ibaraki (Japan); and Takao Wakitani, Takatsuki (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Appl. No. 10/542,612 PCT Filed Nov. 22, 2004, PCT No. PCT/JP2004/017668 § 371(c)(1), (2), (4) Date Jul. 18, 2005, PCT Pub. No. WO2005/052975, PCT Pub. Date Jun. 09, 2005. |
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| Claims priority of application No. 2003-396913 (JP), filed on Nov. 27, 2003. | ||
| Prior Publication US 2006/0132049 A1, Jun. 22, 2006 | ||
| Int. Cl. G09G 3/28 (2006.01) | ||
| U.S. Cl. 345—60 [345/37; 345/41; 345/63; 345/68; 315/169.1; 315/169.3] | 5 Claims |
| 1. A method of testing and inspecting a plasma display panel in which a plurality of cells are formed at an intersection of
each electrode disposed in a row direction and in a column direction, comprising:
forming a field from a plurality of sub-fields, each subfield having an initializing period for producing an initial discharge,
an address period for producing an address discharge with application of an address pulse voltage, and a discharge sustain
period for producing a sustain discharge, and
obtaining a gradation display using a combination of the plurality of sub-fields that are responsible for turning on the plurality
of cells,
wherein, the address pulse voltage is not applied to a target cell in a predetermined sub-field to be tested and inspected,
but is applied to at least one specific cell of adjacent cells positioned adjacent to the target cell, and the address pulse
voltage is applied to the target cell in a successive sub-field, and it is judged whether the target cell in the successive
sub-field is on or not.
|