| US 7,525,325 B1 | ||
| System and method for floating-substrate passive voltage contrast | ||
| Mark W. Jenkins, Albuquerque, N. Mex. (US); Edward I. Cole, Jr., Albuquerque, N. Mex. (US); Paiboon Tangyunyong, Albuquerque, N. Mex. (US); Jerry M. Soden, Placitas, N. Mex. (US); Jeremy A. Walraven, Albuquerque, N. Mex. (US); and Alejandro A. Pimentel, Albuquerque, N. Mex. (US) | ||
| Assigned to Sandia Corporation, Alburquerque, N. Mex. (US) | ||
| Filed on Dec. 18, 2006, as Appl. No. 11/640,720. | ||
| Int. Cl. G01R 31/305 (2006.01); G01R 31/26 (2006.01); G01N 23/00 (2006.01) | ||
| U.S. Cl. 324—751 [438/17; 250/306; 250/307; 250/308; 250/309; 250/310] | 28 Claims |
| 1. A method for measuring passive voltage contrast on a device side of a semiconductor die to locate any defects or failure
mechanisms therein comprising the steps of:
polishing the semiconductor die on the device side thereof down to a first metal layer comprising a plurality of vias;
maintaining the device side of the semiconductor die in an electrically-floating condition without any ground electrical connection;
directing a beam of charged particles at the device side of the semiconductor die, and scanning the beam of charged particles
over the device side of the semiconductor die; and
detecting a secondary particle emission from the device side of the semiconductor die.
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