| US 7,525,185 B2 | ||
| Semiconductor device package having multi-chips with side-by-side configuration and method of the same | ||
| Wen-Kun Yang, Hsin-Chu (Taiwan); Diann-Fang Lin, Hukou Township, Hsinchu County (Taiwan); Tung-Chuan Wang, Yangmei Town (Taiwan); Hsien-Wen Hsu, Lujhou (Taiwan); and Chih-Ming Chen, Sinpu Township, Hsinchu County (Taiwan) | ||
| Assigned to Advanced Chip Engineering Technology, Inc., Hsinchu County (Taiwan) | ||
| Filed on Mar. 19, 2007, as Appl. No. 11/725,827. | ||
| Prior Publication US 2008/0230884 A1, Sep. 25, 2008 | ||
| Int. Cl. H01L 23/02 (2006.01) | ||
| U.S. Cl. 257—678 [257/723] | 16 Claims |
| 1. A structure of semiconductor device package, comprising:
a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface
and second contact pads on a lower surface of said substrate;
a first die having first bonding pads and a second die having second bonding pads disposed within said die receiving through
holes, respectively;
a first adhesion material formed under said first die and said second die;
a second adhesion material filled in the gap between said first and second die and sidewalls of said die receiving though
holes of said substrate;
bonding wires formed to couple between said first bonding pads and said first contact pads, between said second bonding pads
and said first contact pads; and
a dielectric layer formed on said bonding wires, said first die, said second die and said substrate.
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