US 7,524,736 B2
Process for manufacturing wafers usable in the semiconductor industry
Giampiero Ottaviani, Modena (Italy); Federico Corni, Modena (Italy); Paolo Ferrari, Gallarate (Italy); and Flavio Francesco Villa, Milan (Italy)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (Italy)
Filed on Dec. 01, 2006, as Appl. No. 11/607,802.
Claims priority of application No. 05425885 (EP), filed on Dec. 14, 2005.
Prior Publication US 2007/0155183 A1, Jul. 05, 2007
Int. Cl. H01L 21/30 (2006.01); C03C 15/00 (2006.01)
U.S. Cl. 438—455  [438/458; 216/35] 30 Claims
OG exemplary drawing
 
1. A process for manufacturing a layer of semiconductor material, comprising, in sequence:
providing a first wafer of semiconductor material having a first face and a second face;
forming a defect layer in said first wafer at a distance from said first face;
bonding said first face of said first wafer to a second wafer; and
introducing atomic hydrogen into said first wafer through said second face at an energy such as to avoid defects to be generated in said first wafer and at a temperature lower than 600° C., causing the separation of said first wafer into a usable layer bonded to said second wafer and a remaining layer comprised between said defect layer and said second face.