| US 7,524,707 B2 | ||
| Modified hybrid orientation technology | ||
| Olubunmi O. Adetutu, Austin, Tex. (US); Mariam G. Sadaka, Austin, Tex. (US); Ted R. White, Austin, Tex. (US); and Bich-Yen Nguyen, Austin, Tex. (US) | ||
| Assigned to Freescale Semiconductor, Inc., Austin, Tex. (US) | ||
| Filed on Aug. 23, 2005, as Appl. No. 11/209,869. | ||
| Prior Publication US 2007/0048919 A1, Mar. 01, 2007 | ||
| Int. Cl. H01L 21/44 (2006.01) | ||
| U.S. Cl. 438—150 [438/153; 438/222; 438/226; 438/199] | 15 Claims |
| 1. A semiconductor fabrication process, comprising:
forming a first semiconductor layer having a first crystal orientation;
forming a second semiconductor layer over the first semiconductor layer, wherein the second semiconductor layer has a second
crystal orientation that is different from the first crystal orientation;
forming a third semiconductor layer over the first semiconductor layer and within an opening in the second semiconductor layer,
wherein the third semiconductor layer is electrically isolated from the second semiconductor layer and is formed by epitaxially
growing SiGe from the first semiconductor layer having a third crystal orientation that is the same as the first crystal orientation;
and
forming a first high-k gate dielectric layer and first metal gate electrode over the second or third semiconductor layers.
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