| US 7,521,747 B2 | ||
| Vertical transistor and a semiconductor integrated circuit apparatus having the same | ||
| Masahiro Sakuragi, Kyoto (Japan); and Masahiko Sonoda, Kyoto (Japan) | ||
| Assigned to Rohm Co., Ltd., Kyoto (Japan) | ||
| Filed on Apr. 28, 2005, as Appl. No. 11/116,357. | ||
| Claims priority of application No. 2004-136572 (JP), filed on Apr. 30, 2004. | ||
| Prior Publication US 2005/0253174 A1, Nov. 17, 2005 | ||
| Int. Cl. H01L 27/108 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/119 (2006.01) | ||
| U.S. Cl. 257—302 [257/288; 257/401] | 8 Claims |
| 1. A vertical transistor comprising:
a first conduction type region;
a second conduction type drain region formed on the outermost layer portion of the first conduction type region;
a second conduction type base region formed inside of the second conduction type drain region in plan elevation;
a plurality of first conduction type emitter regions formed in the second conduction type base region on the outermost layer
portion thereof at spatial intervals in a predetermined direction; and
a drain contact overlying and connected to a pair of the first conduction type emitter regions and overlying and connected
to a portion of the second conduction type drain region between the pair of first conduction type emitter regions.
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