US 7,521,733 B2
Method for manufacturing an integrated circuit and integrated circuit with a bipolar transistor and a hetero bipolar transistor
Claus Dahl, Dresden (Germany); Karl-Heinz Mueller, Velden (Germany); and Cajetan Wagner, Dresden (Germany)
Assigned to Infineon Technologies AG, Munich (Germany)
Filed on Nov. 12, 2004, as Appl. No. 10/987,952.
Application 10/987952 is a continuation of application No. PCT/EP03/05001, filed on May 13, 2003.
Claims priority of application No. 102 21 416 (DE), filed on May 14, 2002.
Prior Publication US 2005/0156193 A1, Jul. 21, 2005
Int. Cl. H01L 29/737 (2006.01)
U.S. Cl. 257—195  [257/553; 257/E27.056; 257/198] 6 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a semiconductor substrate with layers;
a bipolar transistor in the semiconductor substrate; and
a hetero bipolar transistor in the semiconductor substrate,
wherein collector structures of the bipolar transistor and the hetero bipolar transistor are formed in different regions of the integrated circuit, and
wherein the collector structures of the bipolar transistor and the hetero bipolar transistor comprise
a buried layer;
a collector terminal region; and
an upper layer which is lower doped than the buried layer, and
wherein the upper layer comprises a region, which is higher doped than a portion of the upper layer not comprising the region, the region being disposed below a base of the bipolar transistor, and below a base of the hetero bipolar transistor,
wherein the base of the hetero bipolar transistor is disposed on top of the region, the base of the hetero bipolar transistor of a material different from the material from which the upper layer is made, and
wherein the base layer of the bipolar transistor is implemented by a doped region in the upper layer of the collector structure, and
wherein a distance between the base of the hetero bipolar transistor and the buried layer measured perpendicular to the semiconductor substrate is greater than a distance between the base of the bipolar transistor and the buried layer measured perpendicular to the semiconductor substrate.