| US 7,521,716 B2 | ||
| Electrode substrate, thin-film transistor, display and its production method | ||
| Masahiko Ando, Hatoyama (Japan); Masaya Adachi, Hitachi (Japan); Hiroshi Sasaki, Hitachi (Japan); and Masatoshi Wakagi, Hitachi (Japan) | ||
| Assigned to Hitachi, Ltd., Tokyo (Japan) | ||
| Appl. No. 10/569,834 PCT Filed Aug. 18, 2004, PCT No. PCT/JP2004/012143 § 371(c)(1), (2), (4) Date Feb. 28, 2006, PCT Pub. No. WO2005/024956, PCT Pub. Date Mar. 17, 2005. |
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| Claims priority of application No. 2003-312079 (JP), filed on Sep. 04, 2003. | ||
| Prior Publication US 2006/0261334 A1, Nov. 23, 2006 | ||
| Int. Cl. H01L 29/04 (2006.01) | ||
| U.S. Cl. 257—72 [257/59; 257/347; 257/E21.414; 257/E29.294; 348/149; 348/151] | 10 Claims |
| 1. An electrode substrate in which a lower electrode, an insulating film having lyophobic and lyophilic regions on a surface
thereof and an upper electrode are layered sequentially on a substrate, characterized in that:
the lower electrode has a pattern approximately aligned with that of the lyophobic region on the surface of the insulating
film;
the upper electrode is formed mainly on the lyophilic region other than the lyophobic region on the surface of the insulating
film; and
the upper electrode has a self-aligned pattern in which the pattern of the lower electrode is approximately inversed,
wherein the lower electrode comprises a rectangular shaped gate electrode having a sawtooth-like shape on three of four sides.
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