| US 7,521,368 B2 | ||
| Method for manufacturing semiconductor device | ||
| Tetsuji Yamaguchi, Atsugi (Japan); Etsuko Asano, Atsugi (Japan); Naomi Yazaki, Atsugi (Japan); Tomoya Futamura, Atsugi (Japan); and Tomoko Nishikawa, Atsugi (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (Japan) | ||
| Filed on May 04, 2005, as Appl. No. 11/121,110. | ||
| Claims priority of application No. 2004-139148 (JP), filed on May 07, 2004; and application No. 2004-205413 (JP), filed on Jul. 13, 2004. | ||
| Prior Publication US 2005/0250308 A1, Nov. 10, 2005 | ||
| Int. Cl. H01L 21/302 (2006.01); H01L 21/461 (2006.01) | ||
| U.S. Cl. 438—706 [438/197; 438/513; 438/637; 438/680; 257/E21.17; 257/E21.245; 257/E21.585; 257/E21.632; 257/E21.229] | 18 Claims |
| 1. A method for manufacturing a semiconductor device comprising:
forming a semiconductor layer, a gate insulating film, and a gate electrode over a substrate;
forming an interlayer insulating film over the semiconductor layer, the gate insulating film, and the gate electrode;
forming a conductive metal film over the interlayer insulating film; and
forming a contact hole in the conductive metal film by dry etching and in the interlayer insulating film by dry etching.
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