| US 7,519,894 B2 | ||
| Memory device with error correction code module | ||
| Christian Weiβ, München (Germany); Sven Kalms, München (Germany); and Hermann Ruckerbauer, Moos (Germany) | ||
| Assigned to Infineon Technologies AG, Neubiberg (Germany) | ||
| Filed on Jun. 14, 2005, as Appl. No. 11/151,650. | ||
| Prior Publication US 2007/0011574 A1, Jan. 11, 2007 | ||
| Int. Cl. G11C 29/00 (2006.01) | ||
| U.S. Cl. 714—763 [714/718; 714/723; 360/53; 365/200; 365/201] | 22 Claims |
| 1. A memory device, comprising:
a group of memory modules, each of the memory modules comprising a plurality of memory chips;
an external error correction code (ECC) module comprising at least one memory chip, wherein the external ECC module is configured
to provide ECC functionality that is shared by the memory modules of the group; and
a memory controller configured to synchronously access the at least one memory chip of the external ECC module and memory
chips of the memory modules of the group during a memory access cycle.
|