| US 7,519,874 B2 | ||
| Method and apparatus for bit error rate analysis | ||
| Lawrence Salant, New Hempstead, N.Y. (US); Thierry Campiche, Geneva (Switzerland); Martin Miller, Avusy (Switzerland); and Michael Schnecker, Doylestown, Pa. (US) | ||
| Assigned to LeCroy Corporation, Chestnut Ridge, N.Y. (US) | ||
| Filed on Sep. 29, 2003, as Appl. No. 10/673,712. | ||
| Claims priority of provisional application 60/415155, filed on Sep. 30, 2002. | ||
| Prior Publication US 2004/0123191 A1, Jun. 24, 2004 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 11/00 (2006.01) | ||
| U.S. Cl. 714—704 | 18 Claims |
| 1. A method for determining a bit error rate, comprising the steps of:
acquiring a data signal by an acquisition unit of a test instrument for a predetermined period of time;
storing said data signal in a memory of said test instrument;
recovering a virtual clock from said stored data signal by establishing a threshold and determining pairs of adjacent samples
of said stored data signal that straddle said threshold,
taking into account a hysteresis requirement to confirm that a determined pair of adjacent samples that straddle said threshold
represent a threshold crossing point;
slicing said stored data signal into a plurality of data segments of a predetermined length in accordance with said recovered
a virtual clock;
synchronizing each of said data segments to align them to a frame or predetermined pattern to determine a bit error rate thereof;
and comparing each of said data segments to said predetermined pattern on a bit by bit basis.
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