US 7,518,908 B2
	EEPROM array and method for operation thereof
Eduardo Maayan, Kfar Saba (Israel); Ron Eliyahu, Herzelia (Israel); and Boaz Eitan, Ra'anana (Israel)
Assigned to Saifun Semiconductors Ltd., Netanya (Israel)
Filed on May 28, 2002, as Appl. No. 10/155,215.
Application 10/155215 is a continuation of application No. 09/761818, filed on Jan. 18, 2001, granted, now 6,614,692, filed on Sep. 02, 2003.
Prior Publication US 2003/0039153 A1, Feb. 27, 2003
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/04 (2006.01)

U.S. Cl. 365—185.02  [365/185.03; 365/185.11; 365/185.16; 365/185.29]

22 Claims

1. A method for operating an electrically erasable programmable read only memory (EEPROM) array of non-volatile memory (“NVM”) cells having one or more charge storage regions, said method comprising: mitigating disturb effect during an erase operation by selecting one of said memory cells; and erasing a bit of the selected memory cell while substantially concurrently applying an inhibit word-line voltage to a terminal of an unselected memory cell in proximity with the selected memory cell, such that the inhibit voltage mitigates disturb effect on the unselected cell.