| US 7,518,178 B2 | ||
| Semiconductor memory device | ||
| Akira Takashima, Fuchu (Japan); Hiroshi Watanabe, Yokohama (Japan); Tatsuo Shimizu, Tokyo (Japan); and Takeshi Yamaguchi, Kawasaki (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Sep. 14, 2006, as Appl. No. 11/531,933. | ||
| Claims priority of application No. 2005-357905 (JP), filed on Dec. 12, 2005. | ||
| Prior Publication US 2007/0132003 A1, Jun. 14, 2007 | ||
| Int. Cl. H01L 29/788 (2006.01) | ||
| U.S. Cl. 257—315 [257/316; 257/E29.3; 438/257] | 14 Claims |
| 1. A semiconductor memory device comprising:
a semiconductor substrate;
a first insulating film which is formed on the semiconductor substrate;
a floating gate electrode which is formed on the first insulating film and made of a conductive metal oxide comprising SrTiO3-x (0≤x≤1);
a second insulating film which is formed on the floating gate electrode, has a relative dielectric constant of not less than
7.8, and is made of an insulating metal oxide of a paraelectric material; and
a control gate electrode which is formed on the second insulating film and made of one of a metal and a conductive metal oxide.
|