| US 7,517,816 B2 | ||
| Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress | ||
| Kai Frohberg, Meissen (Germany); Matthias Schaller, Dresden (Germany); and Massud Aminpur, Dresden (Germany) | ||
| Assigned to Advanced Micro Devices, Inc., Austin, Tex. (US) | ||
| Filed on Feb. 15, 2005, as Appl. No. 11/58,035. | ||
| Claims priority of application No. 10 2004 026 149 (DE), filed on May 28, 2004. | ||
| Prior Publication US 2005/0263825 A1, Dec. 01, 2005 | ||
| Int. Cl. H01L 21/31 (2006.01); H01L 21/469 (2006.01); H01L 21/8238 (2006.01) | ||
| U.S. Cl. 438—783 [438/211; 438/761; 438/199] | 6 Claims |

| 1. A method, comprising:
forming a first dielectric layer above a first transistor element and a second transistor element, said first dielectric layer
having a first specified intrinsic mechanical stress;
forming a first liner on said first dielectric layer above said first and said second transistor elements, said liner being
selectively etchable with respect to said first dielectric layer;
selectively etching said first liner above said first transistor element while covering said second transistor element with
a first resist mask;
removing said first resist mask and removing a first portion of said first dielectric layer from above said first transistor
element by selectively etching said first dielectric layer with a wet etch process while using said first liner over said
second transistor element as an etch mask;
forming a second dielectric layer above said first transistor element and a second portion of said first liner and said first
dielectric layer formed above said second transistor element, said second dielectric layer having a second intrinsic stress
differing from said first intrinsic stress; and
selectively modifying said second intrinsic stress in a second portion of said second dielectric layer above said second portion
of said first dielectric layer and said second transistor element by performing an ion bombardment process on said second
portion of said second dielectric layer.
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